Publications Journals

Publications:
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2017

L. Danial, N. Wainstein, S. Kraus, and S. Kvatinsky, "DIDACTIC: A Deeply Intelligent Digital-to-Analog Converter with a Trainable Integrated Circuit using Memristors (submitted)"
M. Ramadan, R. Ginosar, and S. Kvatinsky, "Adaptive Programming in Multi-Level Cell ReRAM (submitted)."
A. Doz, I. Goldstein, and S. Kvatinsky, "Analysis of the Row Grounding Method in a Memristor-Based Crossbar Array", International Journal of Circuit Theory and Applications (in press).
R. Patel S. Kvatinsky E. G. Friedman, "STT-MRAM Based Multistate Register," (submitted)"

2016

Y. Cassuto, S. Kvatinsky, and E. Yaakobi, "Information-Theoretic Sneak Path Mitigation in Memristor Crossbar Arrays", IEEE Transaction on Information Theory, Vol. 62, No. 9, pp. 4801-4814, September 2016
N. Talati, S. Gupta, P. Mane, and S. Kvatinsky, "Logic Design within Memristive Memories Using Memristor Aided loGIC (MAGIC)", IEEE Transactions on Nanotechnology, Vol. 15, No. 4, pp. 635-650, July 2016
N. Talati, S. Gupta, P. Mane, and S. Kvatinsky, "Logic Design within Memristive Memories Using Memristor Aided loGIC (MAGIC): Supplementary material.", IEEE Transactions on Nanotechnology, Vol. 15, No. 4, pp. 635-650, July 2016

2015

D. Soudry, D. Di Castro, A. Gal, A. Kolodny, and S. Kvatinsky, "Memristor-based Multilayer Neural Networks with Online Gradient Descent Training", IEEE Transactions on Neural Networks and Learning Systems , Vol. 26, No. 10, pp. 2408-2421, October 2015 Presentation for Memristor-based Multilayer Neural Networks with Online Gradient Descent Training
L. Yavits, S. Kvatinsky, A. Morad, and R. Ginosar, "Resistive Associative Processor", IEEE Computer Architecture Letters, Vol. 14, No. 2, July-December 2015
Best of CAL winner 2015
S. Kvatinsky, M. Ramadan, E. G. Friedman, and A. Kolodny, "VTEAM – A General Model for Voltage Controlled Memristor", Transactions on Circuits and Systems II: Express Briefs, Vol. 62, No. 8, pp. 786-790, August 2015
R. Patel, S. Kvatinsky, E. G. Friedman, and A. Kolodny, "Multistate Register Based on Resistive RAM", IEEE Transactions on Very Large Scale Integration (VLSI), Vol. 23, No. 9, pp. 1750-1759, September 2015

2014

S. Kvatinsky, Y. H. Nacson, Y. Etsion, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memristor-based Multithreading", IEEE Computer Architecture Letters, Vol. 13, No. 1, pp. 41-44, January-June 2014
S. Kvatinsky, D. Belousov, S. Liman, G. Satat, N. Wald, E. G. Friedman, A. Kolodny, and U. C. Weiser, "MAGIC – Memristor Aided LoGIC", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 61, No. 11, pp. 1-5, November 2014
S. Kvatinsky, N. Wald, G. Satat, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memristor-based Material Implication (IMPLY) Logic: Design Principles and Methodologies", IEEE Transactions on Very Large Scale Integration (VLSI), Vol. 22, No. 10, pp. 2054-2066, October 2014
Y. Levy, J. Bruk, Y. Cassuto, E. G. Friedman, A. Kolodny, E. Yaacobi, and S. Kvatinsky, "Logic Operation in Memory Using a Memristive Akers Array", Microelectronics Journal, Vol. 45, No. 11, pp. 1429-1437, November 2014

2013

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "TEAM - ThrEshold Adaptive Memristor Model", IEEE Transactions on Circuits and Systems I: Regular Paper, Vol. 60, No. 1, pp. 211-221, January 2013
2015 Guillemin-Cauer Best Paper Award