Publications Patents

Granted

L. Azriel and S. Kvatinsky, "Memristive Security Hash Function", US patent application no. 15/965,924
S. Kvatinsky, Y. Levy, and A. Kolodny, "Memristive Akers Logic Array", US patent no. 9548741
S. Kvatinsky, A. Kolodny, R. Patel, and E. G. Friedman, "Multistate Register Having a Flip Flop and Multiple Memristive Devices", US patent no. 9679650 B2
M. Ramadan, S. Kvatinsky, and R. Ginosar, "Adaptive Programming for Memories with Multi-Level Cells", US patent application no. 62/432,615
S. Kvatinsky, D. Belousov, S. Liman, and G. Satat, "A Pure Memristive Logic Gate", US patent no. 9685954
S. Kvatinsky, D. Belousov, S. Liman, N. Wald, and G. Satat, "Pure Memristive Logic Gate", US patent no. 10284203
D. Soudry, S. Kvatinsky, A. Gal, D. Di Castro, and A. Kolodny, "Implementating multiplication in adaptive circuits using memristive devices", US patent no. 9754203.

Pending

S. Kvatinsky, B. Hoffer, E. Yalon, and N. Wainstein, "Logic Gates and Stateful Logic using Phase Change Memory", US patent application no. 63/006,114
B. Hoffer and S. Kvatinsky, "Memristor Aided Logic (MAGIC) using Valence Change Memory (VCM)", US patent application no. 63/006,131
L. Danial and S. Kvatinsky, "Reconfigurable DAC Implemented by Memristor Based Neural Network", US patent application no. 62/530,920 Paper for Reconfigurable DAC Implemented by Memristor Based Neural Network
S. Kvatinsky, A. Kolodny, and U. C. Weiser, "Memristor-Based Multithreading", Israel patent application no. 225988
S. Kvatinsky, A. Kolodny, and U. C. Weiser, "Memristor-Based Multithreading", US patent application no. 14/219,030
A. Morad, L. Yavits, S. Kvatinsky, and R. Ginosar, "A Hybrid Processor", US patent application no. 14/979,880
A. Drori, E. Amrani, and S. Kvatinsky, "Implementation of Logic Circuits with Unipolar Memristive Devices, Thin Film Resistive Switches, and Phase Change Memory", US patent application no. 62/340,559
L. Danial and S. Kvatinsky, "Analog to Digital Converter using Memristors in a Neural Network,", US patent application no. 62/585,578.
B. Perach and S. Kvatinsky, "Asynchronous True Random Number Generator using STTMTJ", US patent application no. 62/774,258.
T. Greenberg-Toledo, D. Soudry, and S. Kvatinsky, "MTJ-Based Hardware Synapse Implementation for Ternary and Binary Deep Neural Networks", US patent application no. 62/730,554
L. Danial and S. Kvatinsky, "Delta-Sigma Modulation Neurons for High Precision Training of Memristive Synapses in Deep Neural Networks", US patent application no. 62/774,933.
P.-E. Gaillardon, E. Giacomin, and S. Kvatinsky, "A Robust Digital RRAM-based Convolutional Block for Low-Power Image Processing and Learning Applications", US patent application no. 62/734,023.
Publications: