Publications Technical Reports

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2016

R. Ben Hur, N. Wald, N. Talati, and S. Kvatinsky, "Latency Optimized Mapping of Logic Functions for Memristor Aided Logic (MAGIC)", CCIT Technical Report #908, December 2016 Paper for Latency Optimized Mapping of Logic Functions for Memristor Aided Logic (MAGIC)
X. Yang, J. Pu, B. B. Rister, N. Bhagdikar, J. Ragan-Kelley, S. Richardson, S. Kvatinsky, A. Pedram, and M. Horowitz, "A Systematic Approach to Blocking Convolutional Neural Networks", ArXiv:1606.04209, June 2016

2014

S. Kvatinsky, M. Ramadan, E. G. Friedman, and A. Kolodny, "VTEAM - A General Model for Voltage Controlled Memristors", CCIT Technical Report #856, April 2014 Paper for VTEAM - A General Model for Voltage Controlled Memristors

2013

D. Soudry, D. Di Castro, A. Gal, A. Kolodny, and S. Kvatinsky, "Hebbian Learning Rules with Memristors", CCIT Technical Report #840, September 2013

2012

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "TEAM - Threshold Adaptive Memristor Model", CCIT Technical Report #804, January 2012 Paper for TEAM - Threshold Adaptive Memristor Model

2011

S. Kvatinsky, K. Talisveyberg, D. Fliter, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Verilog-A for Memristor Models", CCIT Technical Report #801, December 2011 Paper for Verilog-A for Memristor Models
S. Kvatinsky, E.G. Friedman, A. Kolodny, and U.C. Weiser, "Memristor-based IMPLY Logic Design Flow", CCIT Technical Report #795, August 2011 Paper for Memristor-based IMPLY Logic Design Flow