Resources Undergraduate Projects

Hardware SecurityRF, Mixed Signal and Analog CircuitsNeural NetworksComputer ArchitectureLogic with Memristors

Hardware Security

Design and Security Analysis of an AES Encryption Module
Abstract:

Side Channel Analysis is a group of attacks that utilize side effects of implementations of cryptographic hardware to gain access to secrets. One of such attacks is a Differential Power Analysis (DPA). DPA is an extremely powerful technique that uses power consumption as a source of leakage. For this, many power traces of execution of cryptographic algorithm are collected and processed. Machine learning techniques are then used to correlate between the power traces and the secret keys. It was first published in 1996, and since then hundreds of works have been published on successful DPA attacks of different types and on protection methods.

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RF, Mixed Signal and Analog Circuits

Memristor-Based Phase Shifters
Abstract:

The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the real challenge is scaling multi-frequency/multiprotocol RF systems and memristors can help us achieve that!

Description:
Supervisor(s):
Requirements:
Waves & Distributed systems, Circuit Theory, RFIC course (recommended)
Memristor-Based Reconfigurable RF Amplifiers
Abstract:

The growing demand to connect up the world is pushing wireless systems to be smaller than ever. This is part of the increasing move to a data driven world with billions of connected devices in the era of the Internet of Things (IoT) and space and energy are critical design criteria. Traditionally, miniaturization was possible owing to a focus in a single frequency and a single communication protocol. However, the real challenge is scaling multi-frequency/multiprotocol RF systems and memristors can help us achieve that!

Description:
Supervisor(s):
Requirements:
Linear circuits, RFIC (recommended)

Neural Networks

Sigma-Delta Neuron for Memristor Learning
Abstract:

The artificial intelligent era has begun! From autonomous cognitive cars to brain-inspired neuromorphic integrated circuits that adaptively interact and precisely trained using the transmitted data. Huge efforts are invested to develop artificial neurons that mimic the functionality of neuro-processing and learning elements.

Biological neurons exchange information by transceiving spikes or pulse trains with other neurons. We show that sigma-delta modulators can be used to model the neural activation. A sigma-delta modulator is an efficient method for encoding analog signals into digital signals as found on high-precision analog to digital converters. While the memristor is used to model the synapse which represents the connection strength between neurons and the firing rate between them.

Description:
Supervisor(s):
Requirements:
Linear electric circuits; recommended: Introduction to Biological Signals & Systems, Mixed-Signals Circuits

Computer Architecture

Automatic Loop-Unrolling Code Conversion to Multi-Threads Enabled
Abstract:

Modern computer systems contain a variety of mechanisms, designed to speed up the execution of certain types of programs. Two examples of such mechanisms are:

  • Loop unrolling, a software tweak that takes loops in a source code and unwinds them so that in each modified iteration, several iterations of the original code are performed. The unrolling itself is done either at compilation time or at runtime, and is somewhat dependent on the independence of statements from different iterations.
  • Multithreading: a hardware mechanism that allows multiple threads of code to run “simultaneously”. While the processor width is not changed, there can be no actual simultaneity between threads. But when one thread faces a delay in execution, another independent thread can continue its execution, thus increasing the total throughput.

Each of these may work better with different software, or even with different compilations of the same code. So a SW/HW vendor needs to choose which of the two (if any) to make optimizations for.

Description:
Supervisor(s):
Requirements:
234267 or 046267 – Computer Architecture, 236360 or 046266 – Compilation; recommended: 046267 – Computer Architecture, 044160 – EE Lab 1

Logic with Memristors

Design of Peripheral Circuit of Memory Array to Perform In-Memory Logic Operations
Abstract:

A memristive device (or a ‘memristor’ in short) is a two-terminal device whose resistance is determined by an internal state, which can be varied by the application of a voltage/current. The capability to toggle resistance (between a Low Resistance State – LRS, and a High Resistance State- HRS) in response to voltage/current is perhaps the most desirable property of memristors, extending their use from memory to computing. They are promising candidates for in-memory computing to solve the von-neumann bottleneck. MAGIC1(Memristor Aided logic) is a memristive logic family which can be used to implement in-memory computing. Combinational logic can be executed in the memory array efficiently using MAGIC logic family.

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