Publications All Publications

A. Eliahu, R. Ben-Hur, R. Ronen, and S. Kvatinsky, "A Technology Backward-Compatible Compilation Flow for Processing-in-Memory", VLSI-SoC: Open Source VLSI Technologies, IFIP Advances in Information and Communication Technology, A. Calimera, P.-E. Gaillardon, K. Korganokar, S. Kvatinsky, R. Reis, (Eds.), Chapter 16, pp. 343-361, Springer, 2021.

A. Eliahu, R. Ben-Hur, A. Haj-Ali, and S. Kvatinsky, "mMPU: Building a Memristor-Based General-Purpose In-Memory Computation Architecture", Multi-Processor System-on-Chip 1 Architectures, L. Andrade and F. Rousseau (Ed.), Chapter 6, pp. 119-132 March 2021.

J. Vieira, E. Giacomin, Y. Qureshi, M. Zapater, X. Tang, S. Kvatinsky, D. Atienza, and P.-E. Gaillardon, "Accelerating Inference on Binary Neural Networks with Digital RRAM Processing", VLSI-SoC: New Technology Enabler, IFIP Advances in Information and Communication Technology, C. Metzler, P.-E. Gaillardon, G. De Micheli, C. Silva-Cardenas, R. Reis, (Eds.), Springer, Chapter 12 , pp. 257-278, 2020.

L. Danial, R. Dhamnani, P.Agrawal, P. Damahe, and S. Kvatinsky, "Neuromorphic Data Converter with Memristors", Emerging Computing: From Devices to Systems, M. M. Sabry and A. Chattopadhyay (Ed.), Springer (in press).

S. Kvatinsky, "Real Processing-in-Memory with Memristive Memory Processing Unit", Vol. 11947, Lecture Notes in Computer Science, Springer (in press).

A. Haj Ali, R. Ronen, R. Ben-Hur, N. Wald, and S. Kvatinsky, "Memristor-Based Processing-in-Memory and its Application on Image Processing", Memristive Devices for Brain-Inspired Computing, Elsevier, 2020.

N. Talati, R. Ben-Hur, N. Wald, A. Haj Ali, J. Reuben, and S. Kvatinsky, "mMPU – A Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck", Applications of Emerging Memory Technology, The Springer Series in Advanced Microelectronics, M. Suri (Ed.), Springer, Chapter 8, pp. 191-213, 2020.

J. Reuben, R. Ben Hur, N. Wald, N. Talati, A. Haj Ali, P.-E. Gaillardon, and S. Kvatinsky, "A Taxonomy and Evaluation Framework for Memristive Logic", Handbook of Memristor Networks, L. O. Chua, G. Sirakoulis, A. Adamatzky (Eds.), pp. 1065-1099 Springer 2019

N. Wald, E. Amrany, A. Drory, and S. Kvatinsky, "Logic with Unipolar Memristors: Circuits and Design Methodology", VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability, IFIP Advances in Information and Communication Technology, T. Hollstein, J. Raik, S. Kostin, A. Tšertov, I. O'Connor, R. Reis (Eds.), Springer, Vol. 508, Chapter 2, pp. 24-40, 2017.

O. Leitersdorf, Y. Boneh, G. Gazit, R. Ronen, and S. Kvatinsky, "FourierPIM: In-Memory Fast Fourier Transform and Polynomial Multiplication", Memories - Materials, Devices, Circuits and Systems, Volume 4, July 2023.

M. A. Hadish, S. Kvatinsky, and A. Gero, "Learning and Instruction that Combine Multiple Levels of Abstraction in Engineering: Attitudes of Students and Faculty", International Journal of Engineering Education, Vol. 39, No. 1, pp. 154–162, 2023

Wang, L. Danial, Y. Li, E. Herbelin, E. Pikhay, Y. Roizin, B. Hoffer, Z. Wang, and S. Kvatinsky, "A memristive deep belief neural network based on silicon synapses", Nature Electronics, December 2022.

M. Zou, N. Du, and S. Kvatinsky, "Review of Security Techniques for Memristor Computing Systems", Frontiers in Electronic Materials, December 2022.

B. Hoffer, N. Wainstein, C. M. Neumann, E. Pop, E. Yalon, and S. Kvatinsky, "Stateful Logic using Phase Change Memory", IEEE Journal of Exploratory Solid-State Computational Devices and Circuits Transactions on Electronic Devices, Vol. 8, No. 2, pp. 77-83, December 2022.

Yang Li, Wei Wang, Di Zhang, Maria Baskin, Aiping Chen, Shahar Kvatinsky, Eilam Yalon, and Lior Kornblum, "Scalable Al2O3-TiO2 Conductive Oxide Interfaces as Defect Reservoirs for Resistive Switching Devices", Advanced Electronic Material, November 2022.

Z. Chen, G. Zhang, H. Cai, C. Bengel, F. Liu, X. Zhao, S. Kvatinsky, H. Schmidt, R. Waser, S. Menzel, and N. Du, "Study on Sneak Path Effect in the Self-rectifying Crossbar Arrays based on Emerging Memristive Devices", Frontiers in Electronic Materials, October 2022, (in press).

I. Salameh, E. G. Friedman, and S. Kvatinsky, "Superconducting Logic Using 2Φ Josephson Junctions with Half Flux Quantum Pulses", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, No. 5, pp. 2533-2537, May 2022.

W. Wang, B. Hoffer, T. Greenberg-Toledo, Y. Li, E. Herbelin, R. Ronen, X. Xu, Y. Zhao, J. Yang, and S. Kvatinsky, "Efficient Training of the Memristive Deep Belief Net Immune to Non-Idealities of the Synaptic Devices", Advanced Intelligent Systems, Vol. 4, No. 5, pp. 22100249, May 2022.

M. M. Dahan, E. T. Breyer, S. Slesazeck, T. Mikolajick, and S. Kvatinsky, "C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 69, No. 4, pp. 1595-1605, April 2022.

W. Wang, L. Danial, E. Herbelin, B. Hoffer, B. Oved, T. Greenberg-Toledo, E. Pikhay, Y. Roizin, and S. Kvatinsky, "Physical-Based Compact Model of Y-Flash Memristor for Neuromorphic Computation", Applied Physics Letters, Vol. 119, No. 26, December 2021.

Y. Li, S. Kvatinsky, and L. Kornblum, "Harnessing Conductive Oxide Interfaces for Resistive Random-Access Memories", Frontiers in Physics, (in press).

O. Leitersdorf, R. Ronen, and S. Kvatinsky, "MultPIM: Fast Stateful Multiplication for Processing-in-Memory", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, No. 3, pp. 1647-1651, March 2022.

T. Greenberg-Toledo, B. Perach, I. Hubara, D. Soudry, S. Kvatinsky, "Training of Quantized Deep Neural Networks using a Magnetic Tunnel Junction-Based Synapse", Semiconductor Science and Technology, Vol. 36, No. 11, October 2021.

M. Zou, J. Zhou, J. Sun, C. Ji, C. Wang, and S. Kvatinsky, "Improving Efficiency and Lifetime of Logic-in-Memory by Combining IMPLY and MAGIC Families", Journal of Systems Architecture, Vol. 119, October 2021.

K. Stern, N. Wainstein, Y. Keller, C. M. Neumann, E. Pop, S. Kvatinsky, and E. Yalon, "Sub-Nanosecond Pulses Enable Partial Reset for Analog Phase Change Memory", IEEE Electron Device Letters, Vol. 42, No. 9, pp. 1291-1294, September 2021.

R. Ronen, A. Eliahu, O. Leitersdorf, N. Peled, K. Korgaonkar, A. Chattopadhyay, B. Perach, and S. Kvatinsky, "The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems", ACM Journal on Emerging Technologies in Computing Systems, Vol. 18, No. 2, Article No. 43, pp. 1-29, April 2022.

N. Wainstein, G. Ankonina, T. Swoboda, M. Muñoz Rojo, S. Kvatinsky, and E. Yalon, "Indirectly Heated Switch as a Platform for Nanosecond Probing of Phase Transition Properties in Chalcogenides", IEEE Transactions on Electron Devices, Vol. 68, Issue 3, pp. 1298-1303, March 2021.

D. Biolek, Z. Kolka, V. Biolkova, Z. Biolek, and S. Kvatinsky, "(V)TEAM for SPICE Simulation of Memristive Devices with Improved Numerical Performance", IEEE Access, Vol. 9, No. 9, pp. 30242-30255, February 2021.

N. Wainstein, E. Yalon, G. Adam, and S. Kvatinsky, "Radiofrequency Switches Based on Emerging Resistive Memory Technologies - A Survey", Proceedings of the IEEE, Vol 109, No. 1, pp. 77-95, January 2021.

N. Wainstein ,G. Ankonina, S. Kvatinsky, and E. Yalon, "Compact Modeling and Electro-Thermal Measurements of Indirectly-Heated Phase Change RF Switches", IEEE Transactions on Electron Devices, Vol. 67, Issue 11, pp. 5182-5187, November 2020.

B. Hoffer, V. Rana, S. Menzel R. Waser, and S. Kvatinsky, "Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)", IEEE Transactions on Electron Devices, Vol. 67, pp. 3115-3122, August 2020.

D. Miron, D. Cohen Azarzar, B. Hoffer, M. Baskin, S. Kvatinsky, E. Yalon and L. Kornblum, "Oxide 2D Electron Gases as a Reservoir of Defects for Resistive Switching", Applied Physics Letters, Vol.116, Issue 22, June 2020

H. Abo Hanna, L. Danial, S. Kvatinsky, and R. Daniel, "Cytomorphic Electronics with Memristors for Modeling Fundamental Genetic Circuits", IEEE Transactions on Biomedical Circuits and Systems, Vol. 14, pp. 386-401, June 2020.

A. Eliahu, R. Ronen, P. E. Gaillardon, and S. Kvatinsky, "multiPULPly: A Multiplication Engine for Accelerating Neural Networks on Ultra-Low-Power Architectures", ACM Journal on Emerging Technologies in Computing Systems, Vol. 1, No. 1, Article 1, January 2020.

L. Danial, E. Pikhay, E. Herbelin, N. Wainstein, V. Gupta, N. Wald, Y. Roizin, R. Daniel, and S. Kvatinsky, "Two-terminal floating-gate transistors with a low-power memristive operation mode for analogue neuromorphic computing", Nature Electronics, Vol. 2, pp. 596-605, December 2019.

R. Ben-Hur, R. Ronen, A. Haj-Ali, D. Bhattacharjee, A. Eliahu, N. Peled, and S. Kvatinsky, "SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 39, No. 10, pp. 2434-2447, October 2020.

B. Perach and S. Kvatinsky, "An Asynchronous and Low-Power True Random Number Generator using STT-MTJ", IEEE Transactions on Very Large Scale Integration Systems, Vol. 27, No. 11, pp. 2473-2484, November 2019.

M. Ramadan, N. Wainstein, R. Ginosar, S. Kvatinsky, "Adaptive Programming in Multi-Level Cell ReRAM", Microelectronics Journal, Vol. 90, pp. 169-180, August 2019.

N. Wald and S. Kvatinsky, "Understanding the influence of device, circuit and environmental variations on real processing in memristive memory using Memristor Aided Logic", Microelectronics Journal, Vol. 86, pp. 22-33, April 2019

T. Greenberg, R. Mazor, A. Haj-Ali, and S. Kvatinsky, "Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 66, No. 4, pp. 1571-1583, April 2019.

E. Giacomin, T. Greenberg, S. Kvatinsky, and P.-E. Gaillardon, "A Robust Digital RRAM-based Convolutional Block for Low-Power Image Processing and Learning Applications", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 62, No. 2, pp. 643-654, February 2019.

N. Talati, H. Ha, B. Perach, R. Ronen, and S. Kvatinsky, "CONCEPT: A Column Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM", IEEE Micro, Vol. 39, No. 1, pp. 33-43, January/February 2019.

A. Haj-Ali, R. Ben-Hur, N. Wald, R. Ronen, and S. Kvatinsky, "IMAGING-In-Memory AlGorithms for Image processiNG", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 65, No 12, pp. 4258-4271, December 2018.

L. Danial, N. Wainstein, S. Kraus, and S. Kvatinsky, "Breaking Through the Speed-Power-Accuracy Tradeoff in ADCs using a Memristive Neuromorphic Architecture", IEEE Transactions on Emerging Topics in Computational Intelligence, Vol. 2, No.5, pp. 396-409, October 2018.

A. Haj Ali, R. Ben Hur, N. Wald, R. Ronen, and S. Kvatinsky, "Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing", IEEE Micro, Vol. 38, No. 5, pp. 13-21, September/October 2018.

N. Wainstein and S. Kvatinsky, "A Lumped RF Model for Nanoscale Memristive Devices and Non-Volatile Single-Pole Double-Throw Switches", IEEE Transactions on Nanotechnology, vol. 17, no. 5, pp. 873-883, September 2018.

N. Wainstein and S. Kvatinsky, "TIME – Tunable Inductors using MEmristors", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 65, No. 5, pp. 1505-1515, May 2018.

L. Danial, N. Wainstein, S. Kraus, and S. Kvatinsky, "DIDACTIC: A Data-Intelligent Digital-to-Analog Converter with a Trainable Integrated Circuit using Memristors", IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 8, No. 1, pp. 146-158, March 2018.

A. Doz, I. Goldstein, and S. Kvatinsky, "Analysis of the Row Grounding Method in a Memristor-Based Crossbar Array", International Journal of Circuit Theory and Applications, Vol. 46, No. 1, pp. 122-137, January 2018

A. Pedram, S. Richardson, S. Galal, S. Kvatinsky and M. Horowitz, "Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era", IEEE Design and Test, Vol. 34, No. 2, pp. 39-50, April 2017

Y. Cassuto, S. Kvatinsky, and E. Yaakobi, "Information-Theoretic Sneak Path Mitigation in Memristor Crossbar Arrays", IEEE Transaction on Information Theory, Vol. 62, No. 9, pp. 4801-4814, September 2016.

N. Talati, S. Gupta, P. Mane, and S. Kvatinsky, "Logic Design within Memristive Memories Using Memristor Aided loGIC (MAGIC)", IEEE Transactions on Nanotechnology, Vol. 15, No. 4, pp. 635-650, July 2016

A. Morad, L. Yavits, S. Kvatinsky, and R. Ginosar, "Resistive GP-SIMD Processing In-Memory", ACM Transactions on Architecture and Code Optimization, Vol. 12, No. 4, Article 57, January 2016

L. Yavits, S. Kvatinsky, A. Morad, and R. Ginosar, "Resistive Associative Processor", IEEE Computer Architecture Letters, Vol. 14, No. 2, July-December 2015

D. Soudry, D. Di Castro, A. Gal, A. Kolodny, and S. Kvatinsky, "Memristor-based Multilayer Neural Networks with Online Gradient Descent Training", IEEE Transactions on Neural Networks and Learning Systems , Vol. 26, No. 10, pp. 2408-2421, October 2015

R. Patel, S. Kvatinsky, E. G. Friedman, and A. Kolodny, "Multistate Register Based on Resistive RAM", IEEE Transactions on Very Large Scale Integration (VLSI), Vol. 23, No. 9, pp. 1750-1759, September 2015

S. Kvatinsky, M. Ramadan, E. G. Friedman, and A. Kolodny, "VTEAM – A General Model for Voltage Controlled Memristor", Transactions on Circuits and Systems II: Express Briefs, Vol. 62, No. 8, pp. 786-790, August 2015

Y. Levy, J. Bruk, Y. Cassuto, E. G. Friedman, A. Kolodny, E. Yaacobi, and S. Kvatinsky, "Logic Operation in Memory Using a Memristive Akers Array", Microelectronics Journal, Vol. 45, No. 11, pp. 1429-1437, November 2014

S. Kvatinsky, D. Belousov, S. Liman, G. Satat, N. Wald, E. G. Friedman, A. Kolodny, and U. C. Weiser, "MAGIC – Memristor Aided LoGIC", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 61, No. 11, pp. 895- 899, November 2014.

S. Kvatinsky, N. Wald, G. Satat, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memristor-based Material Implication (IMPLY) Logic: Design Principles and Methodologies", IEEE Transactions on Very Large Scale Integration (VLSI), Vol. 22, No. 10, pp. 2054-2066, October 2014

S. Kvatinsky, Y. H. Nacson, Y. Etsion, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memristor-based Multithreading", IEEE Computer Architecture Letters, Vol. 13, No. 1, pp. 41-44, January-June 2014

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "The Desired Memristor for Circuit Designers", IEEE Circuits and Systems Magazine, second quarter, Vol. 13, No. 2, pp. 17-22, second quarter 2013

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "TEAM - ThrEshold Adaptive Memristor Model", IEEE Transactions on Circuits and Systems I: Regular Paper, Vol. 60, No. 1, pp. 211-221, January 2013

B. Perach, R. Ronen, and S. Kvatinsky, "On Consistency for Bulk-Bitwise Processing-in-Memory", Proceedings of IEEE/ACM International Symposium on High-Performance Computer Architecture, February 2023 (in press).

A. Gero, M. A. Hadish, and S. Kvatinsky, "Undergraduate Students’ Attitudes Toward an Engineering Course that Integrates Several Levels of Abstraction", Proceedings of the International Conference on Interactive Collaborative Learning and 51st International Conference on Engineering Pedagogy, pp. 491-497, September 2022.

M.Zou, J.Zhou, X.Cui, W.Wang, and S.Kvatinsky, "Enhancing Security of Memristor Computing System Through Secure Weight Mapping", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2022 (in press).

B. Hoffer and S. Kvatinsky, "Performing Stateful Logic Using Spin-Orbit Torque (SOT) MRAM", Proceedings of the IEEE International Conference on Nanotechnology (NANO), July 2022 (in press).

B. Oved, O. Leitersdorf, R. Ronen, and S. Kvatinsky, "HashPIM: High-Throughput SHA-3 via Memristive Digital Processing-in-Memory", Proceedings of the International Conference on Modern Circuits and Systems Technologies, June 2022 (in press).

O. Leitersdorf, R. Ronen, and S. Kvatinsky, "MatPIM: Accelerating Matrix Operations with Memristive Stateful Logic", Proceedings of the International Symposium on Circuits and Systems, May 2022 (in press).

O. Leitersdorf, B. Perach, R. Ronen, and S. Kvatinsky , "Efficient Error-Correcting-Code Mechanism for High-Throughput Memristive Processing-in-Memory", Proceedings of the Design Automation Conference, December 2021.

M. Khalifa, R. Ben-Hur, R. Ronen, O. Leitersdorf, L. Yavits, and S. Kvatinsky, "FiltPIM: In-Memory Filter for DNA Sequencing", Proceedings of the IEEE International Conference on Electronics Circuits and Systems (ICECS), pp. 1-6, November 2021.

O. Leitersdorf, R. Ronen, and S. Kvatinsky, "Making Memristive Processing-in-Memory Reliable", 28th IEEE International Conference on Electronics, Circuits and Systems (ICECS), November 2021.

S. Kvatinsky, "Making Real Memristive Processing-in-Memory Faster and Reliable", Proceedings of the International Cellular Nanoscale Networks and their Applications, pp. 1-3, October 2021.

D. Bhattacharjee, A. Chattopadhyay, S. Dutta, R. Ronen, and S. Kvatinsky, "CONTRA: Area-Constrained Technology Mapping Framework for Memristive Memory Processing Unit", Proceeding of the IEEE International Conference on Computer Aided Design, November 2020 (in press)

N. Peled, R. Ben-Hur, R. Ronen and S. Kvatinsky, "X-MAGIC: Enhancing PIM with Input Overwriting Capabilities", Proceedings of the IFIP/IEEE VLSI-SoC, pp. 64-69, October 2020 (in press)

A. Eliahu, R. Ben-Hur, R. Ronen and S. Kvatinsky, "abstractPIM: Bridging the Gap Between Processing-in-Memory Technology and Instruction Set Architecture", Proceedings of the IFIP/IEEE VLSI-SoC, pp. 28-33, October 2020 (in press)

L. Danial, K. Sharma, and S. Kvatinsky, "A Pipelined Memristive Neural Network Analog-to-Digital Converter", Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), October 2020 (in press).

Loai Danial and Shahar Kvatinsky, "Breaking the Conversion Wall in Mixed-Signal Systems Using Neuromorphic Data Converters", 24th IEEE European Conference on Circuits, Theory and Design, September 2020

N. Wainstein, G. Ankonina, S. Kvatinsky, and E. Yalon, "Nanosecond Probing of Phase Transition Properties in Chalcogenides using Embedded Heater-Thermometer", Proceedings of the Materials Research Society Spring Meeting, April 2020

L. Danial, V. Gupta, E. Pikhay, Y. Roizin, and S. Kvatinsky, "Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing", Proceedings of the Design, Automation and Testing in Europe, March 2020

B. Hoffer, J. Louis and S. Kvatinsky, "Performing Memristor-Aided Logic (MAGIC) using STT-MRAM", ICECS 2019

L. Daniel, K. Sharma, S. Dwivedi, and S. Kvatinsky , "Logarithmic Neural Network Data Converters Using Memristors for Biomedical Applications", IEEE Biomedical Circuits and Systems (BioCAS), pp. 1-4, October 2019

J. Vieira, E. Giacomin, Y. Qureshi, M. Zapater, X. Tang, S. Kvatinsky, D. Atienza, and P.-E. Gaillardon, "A Product Engine for Energy-Efficient Execution of Binary Neural Networks Using Resistive Memories", Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), October 2019 (in press).

S. Kvatinsky, "Real Processing-in-Memory with Memristive Memory Processing Unit (mMPU)", Proceeding of the IEEE International Conference on Application-Specific Systems, Architectures and Processors, July 2019 (in press).

M. Ottavi, V. Gupta, S. Khandelwal, S. Kvatinsky, J. Mathew, E. Martinelli, and A. Jabir, "The Missing Applications Found: Robust Design Techniques and Novel Uses of Memristors", Proceedings of IEEE International Symposium on On-Line Testing and Robust System Design, July 2019 (in press).

N. Wainstein, T. Tsabari, Y. Goldin, E. Yalon and S. Kvatinsky, "A Dual-Band CMOS Low-Noise Amplifier using Memristor-Based Tunable Inductors", Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 290-295, July 2019

L. Danial, S. Thomas, and S. Kvatinsky, "Delta-Sigma Modulation Neurons for High-Precision Training of Memristive Synapses in Deep Neural Networks", Proceedings of the International Symposium on Circuits and Architectures, pp. 1-5, May 2019

B. Perach and S. Kvatinsky, "STT-ANGIE: Asynchronous True Random Number GEnerator Using STT-MTJ", Proceedings of the Design, Automation and Test in Europe, pp. 264-267, March 2019

H. Abo-Hanna, L. Danial, S. Kvatinsky , and R. Daniel, "Memristors as Artificial Biochemical Reactions in Cytomorphic Systems", ICSEEI2018

L. Danial and S. Kvatinsky, "Real-Time Trainable Data Converters for General Purpose Applications", Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, July 2018 (in press).

G. C. Adam, R. Badulescu, S. Iordanescu, N. Wainstein, and S. Kvatinsky, "A TiO2 – Based Radio Frequency Resistive Switch", Proceedings of the International Conference on Electron, Ion, and Photon Beam Technology and Nanofabrication, June 2018

A. Haj-Ali, R. Ben-Hur, N. Wald, and S. Kvatinsky, "Efficient Algorithms for In-Memory Fixed Point Multiplication Using MAGIC", Proceeding of the IEEE International Symposium on Circuits and Systems (ISCAS), June 2018 (in press).

N. Talati, A. Haj Ali, R. Ben Hur, N. Wald, R. Ronen, P.E. Gaillardon, and S. Kvatinsky, "Practical Challenges in Delivering the Promises of Real Processing-in-Memory Machines", Proceedings of the Design, Automation, and Test in Europe (DATE), March 2018 (in press).

R. Ben Hur, N. Wald, N. Talati, and S. Kvatinsky, "SIMPLE MAGIC: Synthesis and Mapping of Boolean Functions for Memristor Aided Logic (MAGIC)", Proceeding of the IEEE International Conference on Computer Aided Design, pp. 225-232, November 2017.

H. Abo Hanna, L. Danial, S. Kvatinsky, and R. Daniel, "Modeling Biochemical Reactions and Gene Networks with Memristors", Proceeding of the IEEE Symposium on Biological Circuits and Systems, October 2017

J. Reuben, R. Ben-Hur, N. Wald, N. Talati, A. Haj Ali, P. Emmanuel Gaillardon, and S. Kvatinsky, "Memristive Logic: A Framework for Evaluation and Comparison", Proceeding of the IEEE International Symposium on Power and Timing Modeling, Optimization and Simulation, September 2017 (in press).

N. Wainstein and S. Kvatinsky, "An RF Memristor Model and Memristive Single-Pole Double-Throw Switches", Proceeding of the IEEE International Conference on Circuits and Systems, May 2017 (in press).

N. Talati, Z. Wang, and S. Kvatinsky, "Rate-Compatible and High-Throughput Architecture Designs for Encoding LDPC Codes", Proceeding of the IEEE International Conference on Circuits and Systems, May 2017 (in press).

L. Azriel and S. Kvatinsky, "Towards a Memristive Hardware Secure Hash Function (MemHash)", Proceedings of the IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2017 (in press).

S. Kvatinsky, R. Ben-Hur, N. Talati, and N. Wald, "mMPU: Memristive Memory Processing Unit", International Conference on Memristive Materials, Devices & Systems, April 2017

S. Hamdioui, S. Kvatinsky, G. Cauwenberghs, L. Xie, K. Bertels, N. Wald, S. Joshi, H. M. Elsayed, and H. Corporaal, "Memristor For Computing: Myth or Reality?", Proceedings of the Design, Automation and Testing in Europe, pp. 722-731, March 2017

N. Wald and S. Kvatinsky, "Design Methodology for Stateful Memristive Logic Gates", Proceedings of the IEEE International Conference on Science of Electrical Engineering, November 2016 (in press).

R. Ben-Hur and S. Kvatinsky, "Memristive Memory Processing Unit (MPU) Controller for In-Memory Processing", Proceedings of the IEEE International Conference on Science of Electrical Engineering, November 2016 (in press).

H. Ha, A. Pedram, S. Richardson, S. Kvatinsky, and M. Horowitz, "Improving Energy Efficiency of DRAM by Exploiting Half Page Row Access", Proceedings of the Annual ACM/IEEE International Symposium on Microarchitecture, pp. 1-12, October 2016

A. Vasilyev, N. Bhagdikar, S. Richardson, A. Pedram, S. Kvatinsky, and M. Horowitz, "Evaluating Programmable Architectures for Image and Vision Applications", Proceedings of the Annual ACM/IEEE International Symposium on Microarchitecture, pp. 1-13, October 2016

E. Amrany, A. Drory, and S. Kvatinsky, "Logic Design with Unipolar Memristors", Proceedings of the IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), September 2016 (in press)

R. Ben-Hur, N. Talati, and S. Kvatinsky, "Algorithmic Considerations in Memristive Memory Processing Units (MPU)", Proceedings of the International Cellular Nanoscale Networks and their Applications, August 2016 (in press)

R. Ben-Hur and S. Kvatinsky, "Memory Processing Unit for In-Memory Processing", Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, July 2016 (in press)

Y. Cassuto, S. Kvatinsky, and E. Yaakobi, "Write Sneak-Path Constraints Avoiding Disturbs in Memristor Crossbar Arrays", Proceedings of the IEEE International Symposium on Information Theory, pp. 950-954, July 2016.

E. Rosenthal, S. Greshnikov, D. Soudry, and S. Kvatinsky, "A Fully Analog Memristor-Based Multilayer Neural Network with Online Backpropagation Training", Proceeding of the IEEE International Conference on Circuits and Systems, pp. 1394-1397, May 2016

M. Ramadan, S. Kvatinsky, and R. Ginosar, "Memristor Modeling", Proceedings of the Workshop on Memristor Technology, Design, Automation and Computing, January 2016

L. Danial and S. Kvatinsky, "Memristive Artificial Neural Networks Based Analog to Digital Converter (ADC)", Proceedings of the Workshop on Memristor Technology, Design, Automation and Computing, January 2016

R. Ben-Hur and S. Kvatinsky, "Processing within a Memristive Memory", Proceedings of the Workshop on Memristor Technology, Design, Automation and Computing, January 2016

Z. Jiang, P. Huang, L. Zhao, S. Kvatinsky, S. Yu, X. Liu, J. Kang, Y. Nishi, and H.-S. P. Wong, "Analysis and Predication on Resistive Random Access Memory (RRAM) 1S1R Array", Proceedings of the 2015 International Memory Workshop, pp. 1-4, May 2015

S. Kvatinsky, Y. H. Nacson, R. Patel, Y. Etsion, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memristive Multistate Pipeline Register", Proceedings of the International Cellular Nanoscale Networks and their Applications, pp. 1-2, July 2014

Y. Cassuto, S. Kvatinsky, and E. Yaakobi, "On the Channel Induced by Sneak-Path Errors in Memristor Arrays", Proceedings of the International Conference on Signal Processing and Communication, pp. 1-6, July 2014

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memory Intensive Computing", Proceeding of the Annual Non-Volatile Memories Workshop, March 2014

Y. Cassuto, S. Kvatinsky, and E. Yaakobi, "Sneak-Path Constraints in Memristor Crossbar Arrays", Proceedings of the IEEE International Symposium on Information Theory, pp. 156-160, July 2013

Y. Cassuto, S. Kvatinsky, and E. Yaakobi, "Sneak-Path Constraints in Memristor Crossbar Arrays", Proceeding of the Annual Non-Volatile Memories Workshop, March 2013

S. Kvatinsky, K. Talisveyberg. D. Fliter, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Models of Memristors for SPICE Simulations", Proceedings of the IEEE Convention of Electrical and Electronics Engineers in Israel, pp. 1-5, November 2012

S. Kvatinsky, N. Wald, G. Satat, E. G. Friedman, A. Kolodny, and U. C. Weiser, "MRL - Memristor Ratioed Logic", Proceedings of the International Cellular Nanoscale Networks and their Applications, pp. 1-6, August 2012

S. Kvatinsky, E.G. Friedman, A. Kolodny, and U.C. Weiser, "Memristor-based IMPLY Logic Design Flow", Proceedings of the IEEE 29th International Conference on Computer Design, pp.142-147, October 2011

S. Kvatinsky, E. G. Friedman , A. Kolodny, and L. Schächter, "Power Grid Analysis Based on a Macro Circuits Model", Proceedings of the IEEE 26th Convention of Electrical and Electronics Engineers in Israel, pp. 708-712, November 2010

T. Greenberg-Toledo, B. Perach, D. Soudry, and S. Kvatinsky, "MTJ-Based Hardware Synapse Design for Ternary Deep Neural Networks", ArXiv:1912.12636, December 2019.

K. Korgaonkar, R. Ronen, A. Chattopadhyay, and S. Kvatinsky, "The Bitlet Model Defining a Litmus Test for the Bitwise Processing-in-Memory Paradigm", ArXiv:1910.10234, October 2019.

R. Ben Hur, N. Wald, N. Talati, and S. Kvatinsky, "Latency Optimized Mapping of Logic Functions for Memristor Aided Logic (MAGIC)", CCIT Technical Report #908, December 2016

X. Yang, J. Pu, B. B. Rister, N. Bhagdikar, J. Ragan-Kelley, S. Richardson, S. Kvatinsky, A. Pedram, and M. Horowitz, "A Systematic Approach to Blocking Convolutional Neural Networks", ArXiv:1606.04209, June 2016

S. Kvatinsky, M. Ramadan, E. G. Friedman, and A. Kolodny, "VTEAM - A General Model for Voltage Controlled Memristors", CCIT Technical Report #856, April 2014

D. Soudry, D. Di Castro, A. Gal, A. Kolodny, and S. Kvatinsky, "Hebbian Learning Rules with Memristors", CCIT Technical Report #840, September 2013

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "TEAM - Threshold Adaptive Memristor Model", CCIT Technical Report #804, January 2012

S. Kvatinsky, K. Talisveyberg, D. Fliter, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Verilog-A for Memristor Models", CCIT Technical Report #801, December 2011

S. Kvatinsky, E.G. Friedman, A. Kolodny, and U.C. Weiser, "Memristor-based IMPLY Logic Design Flow", CCIT Technical Report #795, August 2011

S. Kvatinsky, "Computers that Look Like the Brain", Frontiers for Young Minds, Vol. 8, December 2020.

R. Daniel and S. Kvatinsky, "Combining Biology and Electronics Using Emerging Memristive Technologies", Tower Jazz Technical Journal, Vol. 8, pp. 30-38, June 2017