Publications Book Chapters

Publications:
Book ChaptersJournalsConferencesTechnical ReportsMagazinesPatentsSelected TalksAll Publications

2021

A. Elihau, R. Ben-Hur, R. Ronen, and S. Kvatinsky, "A Technology Backward-Compatible Compilation Flow for Processing-in-Memory", VLSI-SoC: Open Source VLSI Technologies, IFIP Advances in Information and Communication Technology, A. Calimera, P.-E. Gaillardon, K. Korganokar, S. Kvatinsky, R. Reis, (Eds.), Chapter 16, pp. 343-361, Springer, 2021. Paper for A Technology Backward-Compatible Compilation Flow for Processing-in-Memory
A. Eliahu, R. Ben-Hur, A. Haj-Ali, and S. Kvatinsky, "mMPU: Building a Memristor-Based General-Purpose In-Memory Computation Architectur", Multi-Processor System-on-Chip 1 Architectures, L. Andrade and F. Rousseau (Ed.), Chapter 6, pp. 119-132 March 2021.

2020

J. Vieira, E. Giacomin, Y. Qureshi, M. Zapater, X. Tang, S. Kvatinsky, D. Atienza, and P.-E. Gaillardon, "Accelerating Inference on Binary Neural Networks with Digital RRAM Processing", VLSI-SoC: New Technology Enabler, IFIP Advances in Information and Communication Technology, C. Metzler, P.-E. Gaillardon, G. De Micheli, C. Silva-Cardenas, R. Reis, (Eds.), Springer, Chapter 12 , pp. 257-278, 2020.
L. Danial, R. Dhamnani, P.Agrawal, P. Damahe, and S. Kvatinsky, "Neuromorphic Data Converter with Memristors", Emerging Computing: From Devices to Systems, M. M. Sabry and A. Chattopadhyay (Ed.), Springer (in press).
A. Eliahu, R. Ben-Hur, A. Haj-Ali, and S. Kvatinsky, "mMPU: Building a MemristorBased General-Purpose In-Memory Computation Architecture", VLSI-SoC Book, L. Andrade and F. Rousseau (Ed.) Paper for mMPU: Building a MemristorBased General-Purpose In-Memory Computation Architecture
S. Kvatinsky, "Real Processing-in-Memory with Memristive Memory Processing Unit", Vol. 11947, Lecture Notes in Computer Science, Springer (in press).
A. Haj Ali, R. Ronen, R. Ben-Hur, N. Wald, and S. Kvatinsky, "Memristor-Based Processing-in-Memory and its Application on Image Processing", Memristive Devices for Brain-Inspired Computing, Elsevier, 2020.
N. Talati, R. Ben-Hur, N. Wald, A. Haj Ali, J. Reuben, and S. Kvatinsky, "mMPU – A Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck", Applications of Emerging Memory Technology, The Springer Series in Advanced Microelectronics, M. Suri (Ed.), Springer, Chapter 8, pp. 191-213, 2020. Paper for mMPU – A Real Processing-in-Memory Architecture to Combat the von Neumann Bottleneck

2019

J. Reuben, R. Ben Hur, N. Wald, N. Talati, A. Haj Ali, P.-E. Gaillardon, and S. Kvatinsky, "A Taxonomy and Evaluation Framework for Memristive Logic", Handbook of Memristor Networks, L. O. Chua, G. Sirakoulis, A. Adamatzky (Eds.), pp. 1065-1099 Springer 2019 Paper for A Taxonomy and Evaluation Framework for Memristive Logic

2017

N. Wald, E. Amrany, A. Drory, and S. Kvatinsky, "Logic with Unipolar Memristors: Circuits and Design Methodology", VLSI-SoC: System-on-Chip in the Nanoscale Era – Design, Verification and Reliability, IFIP Advances in Information and Communication Technology, T. Hollstein, J. Raik, S. Kostin, A. Tšertov, I. O'Connor, R. Reis (Eds.), Springer, Vol. 508, Chapter 2, pp. 24-40, 2017. Paper for Logic with Unipolar Memristors: Circuits and Design Methodology