M. Zou, Z. Zhu, T. Greenberg-Toledo, O. Leitersdorf, J. Li, J. Zhou, Y. Wang, N. Du, and S. Kvatinsky, "TDPP: Two-Dimensional Permutation-Based Protection of Memristive Deep Neural Networks", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 43, No.3, pp. 742-755, March 2024.

H. Padberg, A. Regev, G. Piccolboni, A. Bricalli, G. Molas, J. F. Nodin, and S. Kvatinsky, "Experimental Demonstration of Non-Stateful In-Memory Logic with 1T1R SiOx Valence Change Mechanism Memristors", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 71, No. 1, pp. 395-399, January 2024.

Z. Sun, S. Kvatinsky, X. Si, A. Mehonic, Y. Cai. and R. Huang , "A full spectrum of computing-in-memory technologies", Nature Electronics, November 2023.

B. Perach, R. Ronen, B. Kimelfeld, and S. Kvatinsky, "Understanding Bulk-Bitwise Processing In-Memory Through Database Analytics", IEEE Transactions on Emerging Topics in Computing, September 2023.

O. Leitersdorf, Y. Boneh, G. Gazit, R. Ronen, and S. Kvatinsky, "FourierPIM: High-throughput in-memory Fast Fourier Transform and polynomial multiplication", Memories - Materials, Devices, Circuits and Systems, Volume 4, July 2023.

M. Khalifa, B. Hoffer, O. Leitersdorf, R. Hanhan, L. Yavits, and S. Kvatinsky, "ClaPIM: Scalable Sequence CLAssification using Processing-In-Memory", IEEE Transactions on Very Large Scale Integration (VLSI) Systems, July 2023 (in press).

O. Leitersdorf, D. Leitersdorf, J. Gal, M. Dahan, R. Ronen, and S. Kvatinsky, "AritPIM: High-Throughput In-Memory Arithmetic", IEEE Transactions on Emerging Topics in Computing (TETC), April 2023.

M. A. Hadish, S. Kvatinsky, and A. Gero, "Learning and Instruction that Combine Multiple Levels of Abstraction in Engineering: Attitudes of Students and Faculty", International Journal of Engineering Education, Vol. 39, No. 1, pp. 154–162, 2023

W. Wang, L. Danial, Y. Li, E. Herbelin, E. Pikhay, Y. Roizin, B. Hoffer, Z. Wang, and S. Kvatinsky, "A memristive deep belief neural network based on silicon synapses", Nature Electronics, December 2022.

M. Zou, N. Du, and S. Kvatinsky, "Review of Security Techniques for Memristor Computing Systems", Frontiers in Electronic Materials, December 2022.

B. Hoffer, N. Wainstein, C. M. Neumann, E. Pop, E. Yalon, and S. Kvatinsky, "Stateful Logic using Phase Change Memory", IEEE Journal of Exploratory Solid-State Computational Devices and Circuits Transactions on Electronic Devices, Vol. 8, No. 2, pp. 77-83, December 2022.

Yang Li, Wei Wang, Di Zhang, Maria Baskin, Aiping Chen, Shahar Kvatinsky, Eilam Yalon, and Lior Kornblum, "Scalable Al2O3-TiO2 Conductive Oxide Interfaces as Defect Reservoirs for Resistive Switching Devices", Advanced Electronic Material, November 2022.

Z. Chen, G. Zhang, H. Cai, C. Bengel, F. Liu, X. Zhao, S. Kvatinsky, H. Schmidt, R. Waser, S. Menzel, and N. Du, "Study on Sneak Path Effect in the Self-rectifying Crossbar Arrays based on Emerging Memristive Devices", Frontiers in Electronic Materials, October 2022, (in press).

I. Salameh, E. G. Friedman, and S. Kvatinsky, "Superconducting Logic Using 2Φ Josephson Junctions with Half Flux Quantum Pulses", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, No. 5, pp. 2533-2537, May 2022.

W. Wang, B. Hoffer, T. Greenberg-Toledo, Y. Li, E. Herbelin, R. Ronen, X. Xu, Y. Zhao, J. Yang, and S. Kvatinsky, "Efficient Training of the Memristive Deep Belief Net Immune to Non-Idealities of the Synaptic Devices", Advanced Intelligent Systems, Vol. 4, No. 5, pp. 22100249, May 2022.

M. M. Dahan, E. T. Breyer, S. Slesazeck, T. Mikolajick, and S. Kvatinsky, "C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 69, No. 4, pp. 1595-1605, April 2022.

O. Leitersdorf, R. Ronen, and S. Kvatinsky, "MultPIM: Fast Stateful Multiplication for Processing-in-Memory", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 69, No. 3, pp. 1647-1651, March 2022.

W. Wang, L. Danial, E. Herbelin, B. Hoffer, B. Oved, T. Greenberg-Toledo, E. Pikhay, Y. Roizin, and S. Kvatinsky, "Physical-Based Compact Model of Y-Flash Memristor for Neuromorphic Computation", Applied Physics Letters, Vol. 119, No. 26, December 2021.

Y. Li, S. Kvatinsky, and L. Kornblum, "Harnessing Conductive Oxide Interfaces for Resistive Random-Access Memories", Frontiers in Physics, (in press).

T. Greenberg-Toledo, B. Perach, I. Hubara, D. Soudry, S. Kvatinsky, "Training of Quantized Deep Neural Networks using a Magnetic Tunnel Junction-Based Synapse", Semiconductor Science and Technology, Vol. 36, No. 11, October 2021.

M. Zou, J. Zhou, J. Sun, C. Ji, C. Wang, and S. Kvatinsky, "Improving Efficiency and Lifetime of Logic-in-Memory by Combining IMPLY and MAGIC Families", Journal of Systems Architecture, Vol. 119, October 2021.

K. Stern, N. Wainstein, Y. Keller, C. M. Neumann, E. Pop, S. Kvatinsky, and E. Yalon, "Sub-Nanosecond Pulses Enable Partial Reset for Analog Phase Change Memory", IEEE Electron Device Letters, Vol. 42, No. 9, pp. 1291-1294, September 2021.

R. Ronen, A. Eliahu, O. Leitersdorf, N. Peled, K. Korgaonkar, A. Chattopadhyay, B. Perach, and S. Kvatinsky, "The Bitlet Model: A Parameterized Analytical Model to Compare PIM and CPU Systems", ACM Journal on Emerging Technologies in Computing Systems, Vol. 18, No. 2, Article No. 43, pp. 1-29, April 2022.

N. Wainstein, G. Ankonina, T. Swoboda, M. Muñoz Rojo, S. Kvatinsky, and E. Yalon, "Indirectly Heated Switch as a Platform for Nanosecond Probing of Phase Transition Properties in Chalcogenides", IEEE Transactions on Electron Devices, Vol. 68, Issue 3, pp. 1298-1303, March 2021.

D. Biolek, Z. Kolka, V. Biolkova, Z. Biolek, and S. Kvatinsky, "(V)TEAM for SPICE Simulation of Memristive Devices with Improved Numerical Performance", IEEE Access, Vol. 9, No. 9, pp. 30242-30255, February 2021.

N. Wainstein, E. Yalon, G. Adam, and S. Kvatinsky, "Radiofrequency Switches Based on Emerging Resistive Memory Technologies - A Survey", Proceedings of the IEEE, Vol 109, No. 1, pp. 77-95, January 2021.

N. Wainstein ,G. Ankonina, S. Kvatinsky, and E. Yalon, "Compact Modeling and Electro-Thermal Measurements of Indirectly-Heated Phase Change RF Switches", IEEE Transactions on Electron Devices, Vol. 67, Issue 11, pp. 5182-5187, November 2020.

B. Hoffer, V. Rana, S. Menzel R. Waser, and S. Kvatinsky, "Experimental Demonstration of Memristor-Aided Logic (MAGIC) Using Valence Change Memory (VCM)", IEEE Transactions on Electron Devices, Vol. 67, pp. 3115-3122, August 2020.

D. Miron, D. Cohen Azarzar, B. Hoffer, M. Baskin, S. Kvatinsky, E. Yalon and L. Kornblum, "Oxide 2D Electron Gases as a Reservoir of Defects for Resistive Switching", Applied Physics Letters, Vol.116, Issue 22, June 2020

H. Abo Hanna, L. Danial, S. Kvatinsky, and R. Daniel, "Cytomorphic Electronics with Memristors for Modeling Fundamental Genetic Circuits", IEEE Transactions on Biomedical Circuits and Systems, Vol. 14, pp. 386-401, June 2020.

A. Eliahu, R. Ronen, P. E. Gaillardon, and S. Kvatinsky, "multiPULPly: A Multiplication Engine for Accelerating Neural Networks on Ultra-Low-Power Architectures", ACM Journal on Emerging Technologies in Computing Systems, Vol. 1, No. 1, Article 1, January 2020.

L. Danial, E. Pikhay, E. Herbelin, N. Wainstein, V. Gupta, N. Wald, Y. Roizin, R. Daniel, and S. Kvatinsky, "Two-terminal floating-gate transistors with a low-power memristive operation mode for analogue neuromorphic computing", Nature Electronics, Vol. 2, pp. 596-605, December 2019.

Jacobs Best Paper Award

R. Ben-Hur, R. Ronen, A. Haj-Ali, D. Bhattacharjee, A. Eliahu, N. Peled, and S. Kvatinsky, "SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput", IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 39, No. 10, pp. 2434-2447, October 2020.

B. Perach and S. Kvatinsky, "An Asynchronous and Low-Power True Random Number Generator using STT-MTJ", IEEE Transactions on Very Large Scale Integration Systems, Vol. 27, No. 11, pp. 2473-2484, November 2019.

M. Ramadan, N. Wainstein, R. Ginosar, S. Kvatinsky, "Adaptive Programming in Multi-Level Cell ReRAM", Microelectronics Journal, Vol. 90, pp. 169-180, August 2019.

N. Wald and S. Kvatinsky, "Understanding the influence of device, circuit and environmental variations on real processing in memristive memory using Memristor Aided Logic", Microelectronics Journal, Vol. 86, pp. 22-33, April 2019

T. Greenberg, R. Mazor, A. Haj-Ali, and S. Kvatinsky, "Supporting the Momentum Training Algorithm Using a Memristor-Based Synapse", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 66, No. 4, pp. 1571-1583, April 2019.

N. Talati, H. Ha, B. Perach, R. Ronen, and S. Kvatinsky, "CONCEPT: A Column Oriented Memory Controller for Efficient Memory and PIM Operations in RRAM", IEEE Micro, Vol. 39, No. 1, pp. 33-43, January/February 2019.

E. Giacomin, T. Greenberg, S. Kvatinsky, and P.-E. Gaillardon, "A Robust Digital RRAM-based Convolutional Block for Low-Power Image Processing and Learning Applications", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 62, No. 2, pp. 643-654, February 2019.

A. Haj-Ali, R. Ben-Hur, N. Wald, R. Ronen, and S. Kvatinsky, "IMAGING-In-Memory AlGorithms for Image processiNG", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 65, No 12, pp. 4258-4271, December 2018.

L. Danial, N. Wainstein, S. Kraus, and S. Kvatinsky, "Breaking Through the Speed-Power-Accuracy Tradeoff in ADCs using a Memristive Neuromorphic Architecture", IEEE Transactions on Emerging Topics in Computational Intelligence, Vol. 2, No.5, pp. 396-409, October 2018.

A. Haj Ali, R. Ben Hur, N. Wald, R. Ronen, and S. Kvatinsky, "Not in Name Alone: A Memristive Memory Processing Unit for Real In-Memory Processing", IEEE Micro, Vol. 38, No. 5, pp. 13-21, September/October 2018.

N. Wainstein and S. Kvatinsky, "A Lumped RF Model for Nanoscale Memristive Devices and Non-Volatile Single-Pole Double-Throw Switches", IEEE Transactions on Nanotechnology, vol. 17, no. 5, pp. 873-883, September 2018.

N. Wainstein and S. Kvatinsky, "TIME – Tunable Inductors using MEmristors", IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 65, No. 5, pp. 1505-1515, May 2018.

L. Danial, N. Wainstein, S. Kraus, and S. Kvatinsky, "DIDACTIC: A Data-Intelligent Digital-to-Analog Converter with a Trainable Integrated Circuit using Memristors", IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Vol. 8, No. 1, pp. 146-158, March 2018.

A. Doz, I. Goldstein, and S. Kvatinsky, "Analysis of the Row Grounding Method in a Memristor-Based Crossbar Array", International Journal of Circuit Theory and Applications, Vol. 46, No. 1, pp. 122-137, January 2018

A. Pedram, S. Richardson, S. Galal, S. Kvatinsky and M. Horowitz, "Dark Memory and Accelerator-Rich System Optimization in the Dark Silicon Era", IEEE Design and Test, Vol. 34, No. 2, pp. 39-50, April 2017

Y. Cassuto, S. Kvatinsky, and E. Yaakobi, "Information-Theoretic Sneak Path Mitigation in Memristor Crossbar Arrays", IEEE Transaction on Information Theory, Vol. 62, No. 9, pp. 4801-4814, September 2016.

N. Talati, S. Gupta, P. Mane, and S. Kvatinsky, "Logic Design within Memristive Memories Using Memristor Aided loGIC (MAGIC)", IEEE Transactions on Nanotechnology, Vol. 15, No. 4, pp. 635-650, July 2016

A. Morad, L. Yavits, S. Kvatinsky, and R. Ginosar, "Resistive GP-SIMD Processing In-Memory", ACM Transactions on Architecture and Code Optimization, Vol. 12, No. 4, Article 57, January 2016

L. Yavits, S. Kvatinsky, A. Morad, and R. Ginosar, "Resistive Associative Processor", IEEE Computer Architecture Letters, Vol. 14, No. 2, July-December 2015

Best of CAL winner 2015

D. Soudry, D. Di Castro, A. Gal, A. Kolodny, and S. Kvatinsky, "Memristor-based Multilayer Neural Networks with Online Gradient Descent Training", IEEE Transactions on Neural Networks and Learning Systems , Vol. 26, No. 10, pp. 2408-2421, October 2015

R. Patel, S. Kvatinsky, E. G. Friedman, and A. Kolodny, "Multistate Register Based on Resistive RAM", IEEE Transactions on Very Large Scale Integration (VLSI), Vol. 23, No. 9, pp. 1750-1759, September 2015

S. Kvatinsky, M. Ramadan, E. G. Friedman, and A. Kolodny, "VTEAM – A General Model for Voltage Controlled Memristor", Transactions on Circuits and Systems II: Express Briefs, Vol. 62, No. 8, pp. 786-790, August 2015

Y. Levy, J. Bruk, Y. Cassuto, E. G. Friedman, A. Kolodny, E. Yaacobi, and S. Kvatinsky, "Logic Operation in Memory Using a Memristive Akers Array", Microelectronics Journal, Vol. 45, No. 11, pp. 1429-1437, November 2014

S. Kvatinsky, D. Belousov, S. Liman, G. Satat, N. Wald, E. G. Friedman, A. Kolodny, and U. C. Weiser, "MAGIC – Memristor Aided LoGIC", IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 61, No. 11, pp. 895- 899, November 2014.

S. Kvatinsky, N. Wald, G. Satat, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memristor-based Material Implication (IMPLY) Logic: Design Principles and Methodologies", IEEE Transactions on Very Large Scale Integration (VLSI), Vol. 22, No. 10, pp. 2054-2066, October 2014

S. Kvatinsky, Y. H. Nacson, Y. Etsion, E. G. Friedman, A. Kolodny, and U. C. Weiser, "Memristor-based Multithreading", IEEE Computer Architecture Letters, Vol. 13, No. 1, pp. 41-44, January-June 2014

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "The Desired Memristor for Circuit Designers", IEEE Circuits and Systems Magazine, second quarter, Vol. 13, No. 2, pp. 17-22, second quarter 2013

S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "TEAM - ThrEshold Adaptive Memristor Model", IEEE Transactions on Circuits and Systems I: Regular Paper, Vol. 60, No. 1, pp. 211-221, January 2013

2015 Guillemin-Cauer Best Paper Award