A PUF, which is analog to the human fingerprint, is an identification for hardware. The unique hardware fingerprint is extracted from a physical circuit by digitizing its static randomness [1]. Such a physical circuit is also named an entropy source (ES). So far, various PUF ES designs with traditional CMOS circuits and emerging devices have been demonstrated for better static randomness and robustness.
In contrast, a TRNG exploits the dynamic randomness (e.g., the random switching time of memristors) in an ES to continually generate a truly random and unpredictable bitstream [2]. The TRNG ES design usually requires dedicated CMOS circuits where the transistor mismatch must be strictly confined.
Emerging memory devices, memristors, are found to be suitable for TRNG and PUF ES designs because of their inherent and easily extractable random characteristics. Memristors improve circuit density and power efficiency. The randomness can be easily extracted from memristors, and negligible entropy is lost in the digitization process. Plenty of randomness sources have been successfully demonstrated to design PUF and TRNG, including resistance variation, write speed variation, probabilistic switching, readout noise, and sneak path currents. At ASIC2, we design different PUF and TRNG circuits and experimentally test them based on different memristive technologies and physical phenomena.
Memristor-based memory demonstrates a promising feature in processing data directly where they are located, avoiding the expensive data movement between memory and processing units. Memristor computing systems could accelerate various data-intensive algorithms such as deep neural networks, DNA sequencing, etc. However, more attention needs to be paid to the security of memristor computing systems. These emerging computing systems may be vulnerable to hardware attacks against conventional computing systems, such as side-channel and fault attacks. Moreover, the non-volatility of memristor devices may expose the data stored in memristor devices to attackers with physical access to the systems [3].
At ASIC2, we investigate the security issues of memristor computing systems at multiple levels, i.e., the memristor circuits, the computing architectures, and the algorithms. We pay particular attention to the hardware overhead imposed by security countermeasures. Our goal is to deliver a secure, enhanced memristor computing system while maintaining its high energy efficiency, which is essential before this technology is widely applied in our society.
This research is partially funded by the Technion Hiroshi Fujiwara Cyber Security Research Center and by Israel National Cyber Bureau.
[1] L. Azriel and S. Kvatinsky, “Towards a memristive hardware secure hash function (MemHash),” 2017 IEEE International Symposium on Hardware Oriented Security and Trust (HOST), Mclean, VA, USA, 2017, pp. 51-557
[2] B. Perach and S. Kvatinsky, “STT-ANGIE: Asynchronous True Random Number GEnerator Using STT-MTJ,” 2019 Design, Automation & Test in Europe Conference & Exhibition (DATE), Florence, Italy, 2019, pp. 264-267
[3] M. Zou, J. Zhou, X. Cui, W. Wang, and S. Kvatinsky, “Enhancing Security of Memristor Computing System Through Secure Weight Mapping”, Proceedings of the IEEE Computer Society Annual Symposium on VLSI (ISVLSI), pp. 182-187, July 2022