// Generated for: spectre // Generated on: Feb 16 16:29:21 2020 // Design library name: cmIPCS // Design cell name: IPCS_test // Design view name: schematic simulator lang=spectre global 0 parameters t_SiOx=100n t_GeTe=200n init=1 R_air=10e6 R_side2=10K \ R_side=28K Rin=37.5 Rch=15 Va=10 Vc=7.5 TBR=1.3 LH=20u WRF=20u WH=2u \ tamor=800n tcryst=1.2u tW=100n t_TB=50n t_capping=30n dt=1n include "global.scs" section=BSIM include "global_5V.scs" section=PSP include "fet.scs" section=NOM include "fethv.scs" section=NOM include "nat.scs" section=NOM include "bjt.scs" section=NOM include "accap.scs" section=NOM include "mimcap.scs" section=NOM include "mfc.scs" section=NOM include "res.scs" section=NOM include "diode.scs" section=NOM include "ind.scs" section=NOM include "esd.scs" section=ESD // Library name: PCM // Cell name: IPCS_test // View name: schematic I24 (Vin 0 V_test 0 T_GeTe T_heater) IPCS_model WH=WH LH=LH WRF=WRF LRF=2e-06 t_W=tW t_GeTe=t_GeTe t_TB=t_TB t_capping=t_capping t_SiOx=t_SiOx t_Si=0.0005 t_contacts=1.5e-07 Rsh_heater0=3.6 Rc_heater=1.3e-05 Rc_GeTe=1e-05 Rsh=33 Roff=10000 Ta=998 Tc=723 init_state=init dt=dt V7 (Vapp 0) vsource type=pwl wave=[ 0 0 50n Vc (50n+tcryst) Vc (150n+tcryst) 0 2u 0 (2u+5p) Va (2u+10p+tamor) Va (2u+15p+tamor) 0 4u 0 ] V6 (V_test 0) vsource dc=1 type=dc R11 (Vapp Vin) resistor r=50 simulatorOptions options reltol=1e-3 vabstol=1e-6 iabstol=1e-12 temp=27 \ tnom=27 scalem=1.0 scale=1e-06 gmin=1e-12 rforce=1 maxnotes=5 \ maxwarns=5 digits=5 cols=80 pivrel=1e-3 sensfile="../psf/sens.output" \ checklimitdest=both tran tran stop=3.5u write="spectre.ic" writefinal="spectre.fc" \ annotate=status maxiters=5 finalTimeOP info what=oppoint where=rawfile modelParameter info what=models where=rawfile element info what=inst where=rawfile outputParameter info what=output where=rawfile designParamVals info what=parameters where=rawfile primitives info what=primitives where=rawfile subckts info what=subckts where=rawfile save T_GeTe Vin V6:p T_heater I24:DC_n V_test Vapp Vin saveOptions options save=allpub subcktprobelvl=2 ahdl_include "../veriloga.va"