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Prof. Shahar Kvatinsky has given a plenary talk in the DANTE workshop at Politecnico di Torino, Italy

September 13th, 2018

Prof. Shahar Kvatinsky has given a plenary talk on “Real Processing-in-Memory using Memristive Memory Processing Unit” in the DANTE workshop on In-Memory Computing: Emerging Devices, Architectures, and Applications on September 13th at Politecnico di Torino, Italy

Abstract – Computers have been built for many years in a structure where data is processed and stored using separate units – the processor and the memory. However, emerging applications such as artificial intelligence and internet-of- things require ample amount of data to be processed from numerous origins. This forces enormous data movement that becomes the main limitation in modern computing systems. Not only that the speed of computers is limited by this data movement, but also the energy consumption is mostly because of this transfer rather than the computation itself. An attractive approach to alleviate the data movement problem is to process data inside the memory. Unfortunately, contemporary memory technologies are ill-suited for such approach. Memristive technologies are attractive candidates to replace conventional memory technologies, and can also be used to perform logic and arithmetic operations using a technique called ‘stateful logic.’ Combining data storage and computation in the memory array enables a novel non-von Neumann architecture, where both the operations are performed within a memristive Memory Processing Unit (mMPU). mMPU relies on adding computing capabilities to the memristive memory cells without changing the basic memory array structure, and by that alleviating the primary restriction on performance and energy in modern computers. This talk focuses on the various aspects of mMPU. I will describe how memristors can be used for processing-in-memory and how it can be scaled as a wide SIMD like architecture. Later, I will show how different sequences of computing operations in an mMPU can be automatically optimized as sequences of basic Memristor Aided Logic (MAGIC) NOR and NOT operations. I will finalize by discussing the mMPU architecture and implications on the computing system and software, as well as examining the microarchitectural aspects.

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