Our student, Issa Salameh presented his final M. Sc. seminar about “Superconductive Logic Circuits with Half Flux Quantum Pulses” which deals with logic circuits in cryogenic temperatures using Josephson junctions, scalability issues, and solutions to more scalable and energy efficient circuits.
Prof. Shahar Kvatinsky gave an invited talk about “Real Digital Processing-in-Memory with the Memristive Memory Processing Unit” at The 5th International Conference on Memristive Materials, Devices & Systems (MEMRISYS 2022), USA.
The C-AND architecture is a ferroelectric memory architecture in which each memory cell consists of a single FeFET and uses a mixed writing scheme. Compared to the previous AND architecture, the C-AND reduces write disturbs and prevents read errors.
Transistors are the building blocks of today’s integrated circuits. However, their scaling with the same pace to maintain Moore’s law becomes not economical. Prof. Kvatinsky presents some alternative approaches for alternative devices and new architectures to continue improving computers. He discusses how Memristors can be used to store data and surveys the work that is done in our lab related to that.
-This talk was given at the Technion EE faculty meeting in June 2019.
In this talk, Prof. Kvatinsky describes the way Memristors function and show how they can be used for logic operations. He explains about Memristors’ polarity and presents three logic families with Memristors. He raises the methodological problems Memristors consist as well as the opportunities they hold.
-This talk was given at the ACRC workshop in March 2012.
The mMPU has the potential in overcoming the von Neumann structure bottleneck and using MAGIC (Memristor Aided LoGIC) shows enormous advantages in particular.
-This talk was given at the Stephen and Sharon Seiden Frontiers in Engineering and Science workshop at the Technion in June 2017.