Resources Lab Videos

Architecture for Bulk-Bitwise Processing-In-Memory

Our student, Ben Perach presented his final Ph.D. seminar about “Architecture for Bulk-Bitwise Processing-In-Memory” and explained his research on how bulk-bitwise processing-in-memory can be enabled in modern computer systems.

Architecture for Bulk-Bitwise Processing-In-Memory Play
Superconductive Logic Circuits with Half Flux Quantum Pulses

Our student, Issa Salameh presented his final M. Sc. seminar about “Superconductive Logic Circuits with Half Flux Quantum Pulses” which deals with logic circuits in cryogenic temperatures using Josephson junctions, scalability issues, and solutions to more scalable and energy efficient circuits.

Superconductive Logic Circuits with Half Flux Quantum Pulses Play
Welcome to ASIC² lab!

We are working on emerging technology in computer architecture, VLSI systems and integrated circuits design. Enjoy our lab tour! This is where the “MAGIC” happens…

Welcome to ASIC² lab! Play
Real Digital Processing-in-Memory with the Memristive Memory Processing Unit

Prof. Shahar Kvatinsky gave an invited talk about “Real Digital Processing-in-Memory with the Memristive Memory Processing Unit” at The 5th International Conference on Memristive Materials, Devices & Systems (MEMRISYS 2022), USA.

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Fast Reliable Digital Processing-in-Memory

Our PhD student Orian Leitersdorf gave a talk on “Fast Reliable Digital Processing-in-Memory” at the SAFARI Research Group in ETH Zürich.

Fast Reliable Digital Processing-in-Memory Play
Making Real Memristive Processing-in-Memory Faster and Reliable

 

Prof. Kvatinsky gave a seminar about “Making Real Memristive Processing-in-Memory Faster and Reliable” at Northwestern University, Evanston, Illinois, USA.

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Superconductive Logic Using 2phi -Josephson Junctions with Half Flux Quantum Pulses

Our graduate student Issa Salameh presented about ‘Superconductive Logic Using 2phi -Josephson Junctions with Half Flux Quantum Pulses’ at The IEEE International Symposium on Circuits and Systems (ISCAS) 2022, USA.

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MatPIM: Accelerating Matrix Operations with Memristive Stateful Logic

Our Ph.D student Orian Leitersdorf presented about ‘MatPIM: Accelerating Matrix Operations with Memristive Stateful Logic’ at The IEEE International Symposium on Circuits and Systems (ISCAS) 2022, USA.

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C-AND: Mixed Writing Scheme for Disturb Reduction in 1T Ferroelectric FET Memory

The C-AND architecture is a ferroelectric memory architecture in which each memory cell consists of a single FeFET and uses a mixed writing scheme. Compared to the previous AND architecture, the C-AND reduces write disturbs and prevents read errors.

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Reconfigurable RF circuits based on Emerging Resistive Memories

Nicolas Wainstein’s graduating seminar video

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abstractPIM: Bridging the Gap Between PIM Technology and ISA

A. Eliahu, R. Ben-Hur, R. Ronen and S. Kvatinsky, “abstractPIM: Bridging the Gap Between PIM Technology and ISA”, The 28th IFIP/IEEE Int.l Conference on Very Large Scale Integration (VLSI-SoC), October 2020

abstractPIM: Bridging the Gap Between PIM Technology and ISA Play
X-MAGIC: Enhancing PIM using Input-Overwriting Capabilities

N. Peled, R. Ben-Hur, R. Ronen and S. Kvatinsky, “X-MAGIC: Enhancing PIM using Input-Overwriting Capabilities”, The 28th IFIP/IEEE Int.l Conference on Very Large Scale Integration (VLSI-SoC), October 2020

X-MAGIC: Enhancing PIM using Input-Overwriting Capabilities Play
Conversion In-Memory using Memristive Neural Networks

This video contains a virtual presentation of the tutorial “Conversion-in-Memory Using Memristive Neural Networks” given in the Friday CIM workshop in DATE 2020 by Loai Danial.

Conversion In-Memory using Memristive Neural Networks Play
Modeling a Floating-Gate Memristive Device for Computer-Aided Design of Neuromorphic Computing

This video contains a virtual presentation of the paper entitled “Modeling a Floating-Gate Memristive Device for Computer Aided Design of Neuromorphic Computing” at DATE 2020 conference. 

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Interim Summary - insights of a faculty who's not so young anymore...

After receiving the promotion to Associate Professor with tenure, prof. Kvatinsky shares his insights and gives some useful tips in an inspirational talk to the EE department.

-This talk was given in January 2020.

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Playing LEGO with Memristors

Transistors are the building blocks of today’s integrated circuits. However, their scaling with the same pace to maintain Moore’s law becomes not economical. Prof. Kvatinsky presents some alternative approaches for alternative devices and new architectures to continue improving computers. He discusses how Memristors can be used to store data and surveys the work that is done in our lab related to that.

 

-This talk was given at the Technion EE faculty meeting in June 2019.

Playing LEGO with Memristors Play
The Israeli Education Channel, “Galileo", Season 9, Episode 1 (Hebrew) 

Prof. Kvatinsky presents to the young viewers a brief view of artificial intelligence and talks about the aims and challenges involved with teaching computers to perform complex operations instead of humans.

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The Israeli Education Channel, “Galileo", Season 9, Episode 2 (Hebrew)

Prof. Kvatinsky explains how modern computers work and in which way computer science inspires them to develop.

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The Israeli Education Channel, “Galileo", Season 9, Episode 3 (Hebrew)

Prof. Kvatinsky explains what is cyber security, how computers can be attacked and how it affects the way that computers are being designed nowadays.

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Memristor-based Logic Circuit Design

In this talk, Prof. Kvatinsky describes the way Memristors function and show how they can be used for logic operations. He explains about Memristors’ polarity and presents three logic families with Memristors. He raises the methodological problems Memristors consist as well as the opportunities they hold.

-This talk was given at the ACRC workshop in March 2012.

Memristor-based Logic Circuit Design Play
mMPU: Memristive Memory Processing Unit

The mMPU has the potential in overcoming the von Neumann structure bottleneck and using MAGIC (Memristor Aided LoGIC) shows enormous advantages in particular.

-This talk was given at the Stephen and Sharon Seiden Frontiers in Engineering and Science workshop at the Technion in June 2017.

mMPU: Memristive Memory Processing Unit Play